Some memory systems, such as solid-state drives (SSDs), contain volatile memory (such as RAM) and a non-volatile memory comprising a plurality of memory dies that can be read or written in parallel. In some memory systems, the non-volatile memory contains physical addresses, while requests to read or write contain logical addresses. The non-volatile memory can contain a logical-to-physical address map that the memory system can use to map the logical address in the request to a corresponding physical address in the memory. In some memory systems, the logical-to-physical address map is stored in the non-volatile memory. In operation, the memory system reads the logical-to-physical address map from the non-volatile memory and stores it in the volatile memory, as reading from the volatile memory is faster and, hence, provides better performance. However, in memory systems with many memory dies, the size of the logical-to-physical address map can be relatively large (e.g., 32 MB) and may not be able to be stored in its entirety in the volatile memory due to resource limitations. In such memory systems, the logical-to-physical address map can be distributed among the memory dies, where each memory die contains a portion (a “translation page”) of the logical-to-physical address map. The translation of a given logical address is done by reading the relevant translation page from the non-volatile memory into volatile memory. Some memory systems rely on a statistical self-balancing technique to use a random pattern to help spread translation pages among the memory dies. Other memory systems use a memory management layer (MML) to help spread data and management information among the memory dies.